Modern microprocessors operate on wide-bit words. For example, it is conventional for some microprocessors to process 64-bit words. As processor clock rates increase ever higher, the routing of such relatively wide-bit words on wide-bit buses becomes problematic. At high transmission speeds, the inevitable skew with regard to propagation on separate traces in the wide-bit buses may lead to unacceptable bit error rates. Moreover, such buses demand a lot of power and are expensive to design.
To enable the high-speed transmission of relatively-wide data words without the skew and distortion issues associated with high-speed wide-bit buses, serializer-deserializer (SERDES) systems have been developed. A SERDES transmitter serializes the data words into a high-speed serial data stream. A SERDES receiver receives the high-speed serial data stream and deserializes it back into the parallel data words. The serial transmission is usually differential and includes an embedded clock. The skew and distortion issues associated with high-speed wide-bit data buses are thus abated.
Although SERDES systems enable very high-speed data transmission such as 10 gigabits per second or even higher rates, the transmission characteristics for the differential serial data channel between the transmitter and receiver are not linear across the corresponding Nyquist bandwidth of 5 GHz. Instead, the channel has a frequency-dependent response that reduces the amplitude of the higher-frequency portions of the data bandwidth. At higher data rates, the capacitive impedance of the channel causes inter-symbol interference (ISI) and other undesirable effects. To counteract the resulting channel distortion, it is conventional to include equalizers in the transmitting and receiving nodes. An equalizer boosts the high-frequency components of the data signal so that the resulting loss from the capacitive channel impedance at the higher frequencies is addressed. Although equalizers desirably boost the signal amplitudes at high frequencies, their use suffers from a number of problems. For example, conventional equalizers require excessive die space, have relatively low DC gain, limited output voltage swing, and consume too much power.
Accordingly, there is a need in the art for improved equalizer design.